Add a new JIT compiler for CPU code (#693)
* Start of the ARMeilleure project
* Refactoring around the old IRAdapter, now renamed to PreAllocator
* Optimize the LowestBitSet method
* Add CLZ support and fix CLS implementation
* Add missing Equals and GetHashCode overrides on some structs, misc small tweaks
* Implement the ByteSwap IR instruction, and some refactoring on the assembler
* Implement the DivideUI IR instruction and fix 64-bits IDIV
* Correct constant operand type on CSINC
* Move division instructions implementation to InstEmitDiv
* Fix destination type for the ConditionalSelect IR instruction
* Implement UMULH and SMULH, with new IR instructions
* Fix some issues with shift instructions
* Fix constant types for BFM instructions
* Fix up new tests using the new V128 struct
* Update tests
* Move DIV tests to a separate file
* Add support for calls, and some instructions that depends on them
* Start adding support for SIMD & FP types, along with some of the related ARM instructions
* Fix some typos and the divide instruction with FP operands
* Fix wrong method call on Clz_V
* Implement ARM FP & SIMD move instructions, Saddlv_V, and misc. fixes
* Implement SIMD logical instructions and more misc. fixes
* Fix PSRAD x86 instruction encoding, TRN, UABD and UABDL implementations
* Implement float conversion instruction, merge in LDj3SNuD fixes, and some other misc. fixes
* Implement SIMD shift instruction and fix Dup_V
* Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table
* Fix check with tolerance on tester
* Implement FP & SIMD comparison instructions, and some fixes
* Update FCVT (Scalar) encoding on the table to support the Half-float variants
* Support passing V128 structs, some cleanup on the register allocator, merge LDj3SNuD fixes
* Use old memory access methods, made a start on SIMD memory insts support, some fixes
* Fix float constant passed to functions, save and restore non-volatile XMM registers, other fixes
* Fix arguments count with struct return values, other fixes
* More instructions
* Misc. fixes and integrate LDj3SNuD fixes
* Update tests
* Add a faster linear scan allocator, unwinding support on windows, and other changes
* Update Ryujinx.HLE
* Update Ryujinx.Graphics
* Fix V128 return pointer passing, RCX is clobbered
* Update Ryujinx.Tests
* Update ITimeZoneService
* Stop using GetFunctionPointer as that can't be called from native code, misc. fixes and tweaks
* Use generic GetFunctionPointerForDelegate method and other tweaks
* Some refactoring on the code generator, assert on invalid operations and use a separate enum for intrinsics
* Remove some unused code on the assembler
* Fix REX.W prefix regression on float conversion instructions, add some sort of profiler
* Add hardware capability detection
* Fix regression on Sha1h and revert Fcm** changes
* Add SSE2-only paths on vector extract and insert, some refactoring on the pre-allocator
* Fix silly mistake introduced on last commit on CpuId
* Generate inline stack probes when the stack allocation is too large
* Initial support for the System-V ABI
* Support multiple destination operands
* Fix SSE2 VectorInsert8 path, and other fixes
* Change placement of XMM callee save and restore code to match other compilers
* Rename Dest to Destination and Inst to Instruction
* Fix a regression related to calls and the V128 type
* Add an extra space on comments to match code style
* Some refactoring
* Fix vector insert FP32 SSE2 path
* Port over the ARM32 instructions
* Avoid memory protection races on JIT Cache
* Another fix on VectorInsert FP32 (thanks to LDj3SNuD
* Float operands don't need to use the same register when VEX is supported
* Add a new register allocator, higher quality code for hot code (tier up), and other tweaks
* Some nits, small improvements on the pre allocator
* CpuThreadState is gone
* Allow changing CPU emulators with a config entry
* Add runtime identifiers on the ARMeilleure project
* Allow switching between CPUs through a config entry (pt. 2)
* Change win10-x64 to win-x64 on projects
* Update the Ryujinx project to use ARMeilleure
* Ensure that the selected register is valid on the hybrid allocator
* Allow exiting on returns to 0 (should fix test regression)
* Remove register assignments for most used variables on the hybrid allocator
* Do not use fixed registers as spill temp
* Add missing namespace and remove unneeded using
* Address PR feedback
* Fix types, etc
* Enable AssumeStrictAbiCompliance by default
* Ensure that Spill and Fill don't load or store any more than necessary
2019-08-08 14:56:22 -04:00
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using ARMeilleure.Memory;
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2019-07-04 11:20:40 -04:00
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using Ryujinx.Common;
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2018-10-17 13:15:50 -04:00
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using Ryujinx.Common.Logging;
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2019-07-04 11:20:40 -04:00
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using Ryujinx.HLE.HOS.Services.Time.TimeZone;
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2018-02-25 13:58:16 -05:00
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using System;
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2018-07-13 17:35:19 -04:00
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using System.Text;
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2018-02-25 13:58:16 -05:00
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2018-08-16 19:47:36 -04:00
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namespace Ryujinx.HLE.HOS.Services.Time
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2018-02-25 13:58:16 -05:00
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{
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2018-03-19 14:58:46 -04:00
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class ITimeZoneService : IpcService
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2018-02-25 13:58:16 -05:00
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{
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2019-07-11 21:13:43 -04:00
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public ITimeZoneService() { }
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2018-02-25 13:58:16 -05:00
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2019-07-11 21:13:43 -04:00
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[Command(0)]
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2019-07-04 11:20:40 -04:00
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// GetDeviceLocationName() -> nn::time::LocationName
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2019-07-14 15:04:38 -04:00
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public ResultCode GetDeviceLocationName(ServiceCtx context)
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2018-04-22 00:21:49 -04:00
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{
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2019-07-04 11:20:40 -04:00
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char[] tzName = TimeZoneManager.Instance.GetDeviceLocationName().ToCharArray();
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2018-07-13 17:35:19 -04:00
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2018-12-06 06:16:24 -05:00
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int padding = 0x24 - tzName.Length;
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2018-04-22 00:21:49 -04:00
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2019-07-04 11:20:40 -04:00
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if (padding < 0)
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{
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2019-07-14 15:04:38 -04:00
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return ResultCode.LocationNameTooLong;
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2019-07-04 11:20:40 -04:00
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}
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context.ResponseData.Write(tzName);
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2018-12-06 06:16:24 -05:00
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for (int index = 0; index < padding; index++)
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2018-04-22 00:21:49 -04:00
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{
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2018-12-06 06:16:24 -05:00
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context.ResponseData.Write((byte)0);
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2018-04-22 00:21:49 -04:00
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}
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2019-07-14 15:04:38 -04:00
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return ResultCode.Success;
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2018-04-22 00:21:49 -04:00
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}
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2019-07-11 21:13:43 -04:00
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[Command(1)]
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2019-07-04 11:20:40 -04:00
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// SetDeviceLocationName(nn::time::LocationName)
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2019-07-14 15:04:38 -04:00
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public ResultCode SetDeviceLocationName(ServiceCtx context)
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2018-02-25 13:58:16 -05:00
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{
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2019-07-04 11:20:40 -04:00
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string locationName = Encoding.ASCII.GetString(context.RequestData.ReadBytes(0x24)).TrimEnd('\0');
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2018-07-13 17:35:19 -04:00
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2019-07-04 11:20:40 -04:00
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return TimeZoneManager.Instance.SetDeviceLocationName(locationName);
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2018-07-13 17:35:19 -04:00
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}
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2019-07-11 21:13:43 -04:00
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[Command(2)]
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2019-07-04 11:20:40 -04:00
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// GetTotalLocationNameCount() -> u32
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2019-07-14 15:04:38 -04:00
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public ResultCode GetTotalLocationNameCount(ServiceCtx context)
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2018-07-13 17:35:19 -04:00
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{
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2019-07-04 11:20:40 -04:00
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context.ResponseData.Write(TimeZoneManager.Instance.GetTotalLocationNameCount());
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2018-07-13 17:35:19 -04:00
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2019-07-14 15:04:38 -04:00
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return ResultCode.Success;
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2018-07-13 17:35:19 -04:00
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}
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2019-07-11 21:13:43 -04:00
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[Command(3)]
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2019-07-04 11:20:40 -04:00
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// LoadLocationNameList(u32 index) -> (u32 outCount, buffer<nn::time::LocationName, 6>)
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2019-07-14 15:04:38 -04:00
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public ResultCode LoadLocationNameList(ServiceCtx context)
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2018-07-13 17:35:19 -04:00
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{
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2019-07-04 11:20:40 -04:00
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uint index = context.RequestData.ReadUInt32();
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long bufferPosition = context.Request.ReceiveBuff[0].Position;
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long bufferSize = context.Request.ReceiveBuff[0].Size;
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2018-07-13 17:35:19 -04:00
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2019-07-14 15:04:38 -04:00
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ResultCode errorCode = TimeZoneManager.Instance.LoadLocationNameList(index, out string[] locationNameArray, (uint)bufferSize / 0x24);
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2018-08-16 19:47:36 -04:00
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2019-07-04 11:20:40 -04:00
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if (errorCode == 0)
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2018-07-13 17:35:19 -04:00
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{
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2019-07-04 11:20:40 -04:00
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uint offset = 0;
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foreach (string locationName in locationNameArray)
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{
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int padding = 0x24 - locationName.Length;
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2018-07-13 17:35:19 -04:00
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2019-07-04 11:20:40 -04:00
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if (padding < 0)
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{
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2019-07-14 15:04:38 -04:00
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return ResultCode.LocationNameTooLong;
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2019-07-04 11:20:40 -04:00
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}
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2018-07-13 17:35:19 -04:00
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2019-07-04 11:20:40 -04:00
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context.Memory.WriteBytes(bufferPosition + offset, Encoding.ASCII.GetBytes(locationName));
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MemoryHelper.FillWithZeros(context.Memory, bufferPosition + offset + locationName.Length, padding);
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2018-07-13 17:35:19 -04:00
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2019-07-04 11:20:40 -04:00
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offset += 0x24;
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2018-07-13 17:35:19 -04:00
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}
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2019-07-04 11:20:40 -04:00
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context.ResponseData.Write((uint)locationNameArray.Length);
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2018-07-13 17:35:19 -04:00
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}
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2018-08-16 19:47:36 -04:00
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2019-07-04 11:20:40 -04:00
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return errorCode;
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2018-07-13 17:35:19 -04:00
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}
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2019-07-11 21:13:43 -04:00
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[Command(4)]
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2019-07-04 11:20:40 -04:00
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// LoadTimeZoneRule(nn::time::LocationName locationName) -> buffer<nn::time::TimeZoneRule, 0x16>
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2019-07-14 15:04:38 -04:00
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public ResultCode LoadTimeZoneRule(ServiceCtx context)
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2018-07-13 17:35:19 -04:00
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{
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2018-12-06 06:16:24 -05:00
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long bufferPosition = context.Request.ReceiveBuff[0].Position;
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long bufferSize = context.Request.ReceiveBuff[0].Size;
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2018-07-13 17:35:19 -04:00
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2018-12-06 06:16:24 -05:00
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if (bufferSize != 0x4000)
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2018-07-13 17:35:19 -04:00
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{
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2019-07-04 11:20:40 -04:00
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// TODO: find error code here
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Logger.PrintError(LogClass.ServiceTime, $"TimeZoneRule buffer size is 0x{bufferSize:x} (expected 0x4000)");
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2018-02-25 13:58:16 -05:00
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2019-07-04 11:20:40 -04:00
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throw new InvalidOperationException();
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}
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2018-07-13 17:35:19 -04:00
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2018-08-16 19:47:36 -04:00
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2019-07-04 11:20:40 -04:00
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string locationName = Encoding.ASCII.GetString(context.RequestData.ReadBytes(0x24)).TrimEnd('\0');
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2018-07-13 17:35:19 -04:00
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2019-07-14 15:04:38 -04:00
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ResultCode resultCode = TimeZoneManager.Instance.LoadTimeZoneRules(out TimeZoneRule rules, locationName);
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Add a new JIT compiler for CPU code (#693)
* Start of the ARMeilleure project
* Refactoring around the old IRAdapter, now renamed to PreAllocator
* Optimize the LowestBitSet method
* Add CLZ support and fix CLS implementation
* Add missing Equals and GetHashCode overrides on some structs, misc small tweaks
* Implement the ByteSwap IR instruction, and some refactoring on the assembler
* Implement the DivideUI IR instruction and fix 64-bits IDIV
* Correct constant operand type on CSINC
* Move division instructions implementation to InstEmitDiv
* Fix destination type for the ConditionalSelect IR instruction
* Implement UMULH and SMULH, with new IR instructions
* Fix some issues with shift instructions
* Fix constant types for BFM instructions
* Fix up new tests using the new V128 struct
* Update tests
* Move DIV tests to a separate file
* Add support for calls, and some instructions that depends on them
* Start adding support for SIMD & FP types, along with some of the related ARM instructions
* Fix some typos and the divide instruction with FP operands
* Fix wrong method call on Clz_V
* Implement ARM FP & SIMD move instructions, Saddlv_V, and misc. fixes
* Implement SIMD logical instructions and more misc. fixes
* Fix PSRAD x86 instruction encoding, TRN, UABD and UABDL implementations
* Implement float conversion instruction, merge in LDj3SNuD fixes, and some other misc. fixes
* Implement SIMD shift instruction and fix Dup_V
* Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table
* Fix check with tolerance on tester
* Implement FP & SIMD comparison instructions, and some fixes
* Update FCVT (Scalar) encoding on the table to support the Half-float variants
* Support passing V128 structs, some cleanup on the register allocator, merge LDj3SNuD fixes
* Use old memory access methods, made a start on SIMD memory insts support, some fixes
* Fix float constant passed to functions, save and restore non-volatile XMM registers, other fixes
* Fix arguments count with struct return values, other fixes
* More instructions
* Misc. fixes and integrate LDj3SNuD fixes
* Update tests
* Add a faster linear scan allocator, unwinding support on windows, and other changes
* Update Ryujinx.HLE
* Update Ryujinx.Graphics
* Fix V128 return pointer passing, RCX is clobbered
* Update Ryujinx.Tests
* Update ITimeZoneService
* Stop using GetFunctionPointer as that can't be called from native code, misc. fixes and tweaks
* Use generic GetFunctionPointerForDelegate method and other tweaks
* Some refactoring on the code generator, assert on invalid operations and use a separate enum for intrinsics
* Remove some unused code on the assembler
* Fix REX.W prefix regression on float conversion instructions, add some sort of profiler
* Add hardware capability detection
* Fix regression on Sha1h and revert Fcm** changes
* Add SSE2-only paths on vector extract and insert, some refactoring on the pre-allocator
* Fix silly mistake introduced on last commit on CpuId
* Generate inline stack probes when the stack allocation is too large
* Initial support for the System-V ABI
* Support multiple destination operands
* Fix SSE2 VectorInsert8 path, and other fixes
* Change placement of XMM callee save and restore code to match other compilers
* Rename Dest to Destination and Inst to Instruction
* Fix a regression related to calls and the V128 type
* Add an extra space on comments to match code style
* Some refactoring
* Fix vector insert FP32 SSE2 path
* Port over the ARM32 instructions
* Avoid memory protection races on JIT Cache
* Another fix on VectorInsert FP32 (thanks to LDj3SNuD
* Float operands don't need to use the same register when VEX is supported
* Add a new register allocator, higher quality code for hot code (tier up), and other tweaks
* Some nits, small improvements on the pre allocator
* CpuThreadState is gone
* Allow changing CPU emulators with a config entry
* Add runtime identifiers on the ARMeilleure project
* Allow switching between CPUs through a config entry (pt. 2)
* Change win10-x64 to win-x64 on projects
* Update the Ryujinx project to use ARMeilleure
* Ensure that the selected register is valid on the hybrid allocator
* Allow exiting on returns to 0 (should fix test regression)
* Remove register assignments for most used variables on the hybrid allocator
* Do not use fixed registers as spill temp
* Add missing namespace and remove unneeded using
* Address PR feedback
* Fix types, etc
* Enable AssumeStrictAbiCompliance by default
* Ensure that Spill and Fill don't load or store any more than necessary
2019-08-08 14:56:22 -04:00
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2019-07-04 11:20:40 -04:00
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// Write TimeZoneRule if success
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if (resultCode == 0)
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2018-07-13 17:35:19 -04:00
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{
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2019-07-04 11:20:40 -04:00
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MemoryHelper.Write(context.Memory, bufferPosition, rules);
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2018-07-13 17:35:19 -04:00
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}
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2018-12-06 06:16:24 -05:00
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return resultCode;
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2018-07-13 17:35:19 -04:00
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}
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2019-07-11 21:13:43 -04:00
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[Command(100)]
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2019-07-04 11:20:40 -04:00
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// ToCalendarTime(nn::time::PosixTime time, buffer<nn::time::TimeZoneRule, 0x15> rules) -> (nn::time::CalendarTime, nn::time::sf::CalendarAdditionalInfo)
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2019-07-14 15:04:38 -04:00
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public ResultCode ToCalendarTime(ServiceCtx context)
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2018-07-13 17:35:19 -04:00
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{
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2018-12-06 06:16:24 -05:00
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long posixTime = context.RequestData.ReadInt64();
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long bufferPosition = context.Request.SendBuff[0].Position;
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long bufferSize = context.Request.SendBuff[0].Size;
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2018-04-10 20:16:27 -04:00
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2018-12-06 06:16:24 -05:00
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if (bufferSize != 0x4000)
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2018-07-13 17:35:19 -04:00
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{
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2019-07-04 11:20:40 -04:00
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// TODO: find error code here
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Logger.PrintError(LogClass.ServiceTime, $"TimeZoneRule buffer size is 0x{bufferSize:x} (expected 0x4000)");
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2018-02-25 13:58:16 -05:00
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2019-07-04 11:20:40 -04:00
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throw new InvalidOperationException();
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}
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2018-07-13 17:35:19 -04:00
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2019-07-04 11:20:40 -04:00
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TimeZoneRule rules = MemoryHelper.Read<TimeZoneRule>(context.Memory, bufferPosition);
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2018-07-13 17:35:19 -04:00
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2019-07-14 15:04:38 -04:00
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ResultCode resultCode = TimeZoneManager.ToCalendarTime(rules, posixTime, out CalendarInfo calendar);
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2018-07-13 17:35:19 -04:00
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2019-07-04 11:20:40 -04:00
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if (resultCode == 0)
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2018-07-13 17:35:19 -04:00
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{
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2019-07-04 11:20:40 -04:00
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context.ResponseData.WriteStruct(calendar);
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2018-07-13 17:35:19 -04:00
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}
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2018-12-06 06:16:24 -05:00
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return resultCode;
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2018-07-13 17:35:19 -04:00
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}
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2019-07-11 21:13:43 -04:00
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[Command(101)]
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2019-07-04 11:20:40 -04:00
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// ToCalendarTimeWithMyRule(nn::time::PosixTime) -> (nn::time::CalendarTime, nn::time::sf::CalendarAdditionalInfo)
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2019-07-14 15:04:38 -04:00
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public ResultCode ToCalendarTimeWithMyRule(ServiceCtx context)
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2018-07-13 17:35:19 -04:00
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{
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2018-12-06 06:16:24 -05:00
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long posixTime = context.RequestData.ReadInt64();
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2018-07-13 17:35:19 -04:00
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2019-07-14 15:04:38 -04:00
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ResultCode resultCode = TimeZoneManager.Instance.ToCalendarTimeWithMyRules(posixTime, out CalendarInfo calendar);
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2019-07-04 11:20:40 -04:00
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if (resultCode == 0)
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{
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context.ResponseData.WriteStruct(calendar);
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}
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return resultCode;
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2018-02-25 13:58:16 -05:00
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}
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2018-08-15 14:53:23 -04:00
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2019-07-11 21:13:43 -04:00
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[Command(201)]
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2019-07-04 11:20:40 -04:00
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// ToPosixTime(nn::time::CalendarTime calendarTime, buffer<nn::time::TimeZoneRule, 0x15> rules) -> (u32 outCount, buffer<nn::time::PosixTime, 0xa>)
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2019-07-14 15:04:38 -04:00
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public ResultCode ToPosixTime(ServiceCtx context)
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2018-08-15 14:53:23 -04:00
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{
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2019-07-04 11:20:40 -04:00
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long inBufferPosition = context.Request.SendBuff[0].Position;
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long inBufferSize = context.Request.SendBuff[0].Size;
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2018-08-15 14:53:23 -04:00
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2019-07-04 11:20:40 -04:00
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CalendarTime calendarTime = context.RequestData.ReadStruct<CalendarTime>();
|
2018-08-15 14:53:23 -04:00
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|
|
2019-07-04 11:20:40 -04:00
|
|
|
if (inBufferSize != 0x4000)
|
2018-08-15 14:53:23 -04:00
|
|
|
{
|
2019-07-04 11:20:40 -04:00
|
|
|
// TODO: find error code here
|
|
|
|
Logger.PrintError(LogClass.ServiceTime, $"TimeZoneRule buffer size is 0x{inBufferSize:x} (expected 0x4000)");
|
2018-08-16 19:47:36 -04:00
|
|
|
|
2019-07-04 11:20:40 -04:00
|
|
|
throw new InvalidOperationException();
|
|
|
|
}
|
2018-08-15 14:53:23 -04:00
|
|
|
|
2019-07-04 11:20:40 -04:00
|
|
|
TimeZoneRule rules = MemoryHelper.Read<TimeZoneRule>(context.Memory, inBufferPosition);
|
2018-08-15 14:53:23 -04:00
|
|
|
|
2019-07-14 15:04:38 -04:00
|
|
|
ResultCode resultCode = TimeZoneManager.ToPosixTime(rules, calendarTime, out long posixTime);
|
2018-08-15 14:53:23 -04:00
|
|
|
|
2019-07-04 11:20:40 -04:00
|
|
|
if (resultCode == 0)
|
2018-08-15 14:53:23 -04:00
|
|
|
{
|
2019-07-04 11:20:40 -04:00
|
|
|
long outBufferPosition = context.Request.RecvListBuff[0].Position;
|
|
|
|
long outBufferSize = context.Request.RecvListBuff[0].Size;
|
2018-08-16 19:47:36 -04:00
|
|
|
|
2019-07-04 11:20:40 -04:00
|
|
|
context.Memory.WriteInt64(outBufferPosition, posixTime);
|
|
|
|
context.ResponseData.Write(1);
|
2018-08-15 14:53:23 -04:00
|
|
|
}
|
|
|
|
|
2018-12-06 06:16:24 -05:00
|
|
|
return resultCode;
|
2018-08-15 14:53:23 -04:00
|
|
|
}
|
|
|
|
|
2019-07-11 21:13:43 -04:00
|
|
|
[Command(202)]
|
2019-07-04 11:20:40 -04:00
|
|
|
// ToPosixTimeWithMyRule(nn::time::CalendarTime calendarTime) -> (u32 outCount, buffer<nn::time::PosixTime, 0xa>)
|
2019-07-14 15:04:38 -04:00
|
|
|
public ResultCode ToPosixTimeWithMyRule(ServiceCtx context)
|
2018-08-15 14:53:23 -04:00
|
|
|
{
|
2019-07-04 11:20:40 -04:00
|
|
|
CalendarTime calendarTime = context.RequestData.ReadStruct<CalendarTime>();
|
2018-08-15 14:53:23 -04:00
|
|
|
|
2019-07-14 15:04:38 -04:00
|
|
|
ResultCode resultCode = TimeZoneManager.Instance.ToPosixTimeWithMyRules(calendarTime, out long posixTime);
|
2018-08-15 14:53:23 -04:00
|
|
|
|
2019-07-04 11:20:40 -04:00
|
|
|
if (resultCode == 0)
|
|
|
|
{
|
|
|
|
long outBufferPosition = context.Request.RecvListBuff[0].Position;
|
|
|
|
long outBufferSize = context.Request.RecvListBuff[0].Size;
|
2018-08-15 14:53:23 -04:00
|
|
|
|
2019-07-04 11:20:40 -04:00
|
|
|
context.Memory.WriteInt64(outBufferPosition, posixTime);
|
2018-08-15 14:53:23 -04:00
|
|
|
|
2019-07-04 11:20:40 -04:00
|
|
|
// There could be only one result on one calendar as leap seconds aren't supported.
|
|
|
|
context.ResponseData.Write(1);
|
|
|
|
}
|
2018-08-15 14:53:23 -04:00
|
|
|
|
2019-07-04 11:20:40 -04:00
|
|
|
return resultCode;
|
2018-08-15 14:53:23 -04:00
|
|
|
}
|
2018-02-25 13:58:16 -05:00
|
|
|
}
|
2019-07-11 21:13:43 -04:00
|
|
|
}
|