2018-04-08 15:17:35 -04:00
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using System;
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using static Ryujinx.Graphics.Gal.Shader.ShaderDecodeHelper;
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namespace Ryujinx.Graphics.Gal.Shader
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{
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static partial class ShaderDecode
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{
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private enum IntType
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{
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U8 = 0,
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U16 = 1,
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U32 = 2,
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U64 = 3,
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S8 = 4,
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S16 = 5,
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S32 = 6,
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S64 = 7
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}
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private enum FloatType
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{
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F16 = 1,
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F32 = 2,
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F64 = 3
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}
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2018-08-31 12:14:04 -04:00
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public static void F2f_C(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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EmitF2f(Block, OpCode, ShaderOper.CR);
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}
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2018-08-31 12:14:04 -04:00
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public static void F2f_I(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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EmitF2f(Block, OpCode, ShaderOper.Immf);
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}
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2018-08-31 12:14:04 -04:00
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public static void F2f_R(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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EmitF2f(Block, OpCode, ShaderOper.RR);
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}
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2018-08-31 12:14:04 -04:00
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public static void F2i_C(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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EmitF2i(Block, OpCode, ShaderOper.CR);
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}
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2018-08-31 12:14:04 -04:00
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public static void F2i_I(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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EmitF2i(Block, OpCode, ShaderOper.Immf);
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}
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2018-08-31 12:14:04 -04:00
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public static void F2i_R(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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EmitF2i(Block, OpCode, ShaderOper.RR);
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}
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2018-08-31 12:14:04 -04:00
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public static void I2f_C(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-08 15:17:35 -04:00
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{
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EmitI2f(Block, OpCode, ShaderOper.CR);
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}
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2018-08-31 12:14:04 -04:00
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public static void I2f_I(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-08 15:17:35 -04:00
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{
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EmitI2f(Block, OpCode, ShaderOper.Imm);
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}
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2018-08-31 12:14:04 -04:00
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public static void I2f_R(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-08 15:17:35 -04:00
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{
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EmitI2f(Block, OpCode, ShaderOper.RR);
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}
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2018-08-31 12:14:04 -04:00
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public static void I2i_C(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-25 22:11:26 -04:00
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{
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EmitI2i(Block, OpCode, ShaderOper.CR);
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}
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2018-08-31 12:14:04 -04:00
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public static void I2i_I(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-25 22:11:26 -04:00
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{
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EmitI2i(Block, OpCode, ShaderOper.Imm);
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}
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2018-08-31 12:14:04 -04:00
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public static void I2i_R(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-25 22:11:26 -04:00
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{
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EmitI2i(Block, OpCode, ShaderOper.RR);
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}
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2018-08-31 12:14:04 -04:00
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public static void Isberd(ShaderIrBlock Block, long OpCode, long Position)
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2018-07-19 01:33:27 -04:00
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{
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//This instruction seems to be used to translate from an address to a vertex index in a GS
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//Stub it as such
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Block.AddNode(new ShaderIrCmnt("Stubbed."));
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2018-09-08 13:51:50 -04:00
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Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), OpCode.Gpr8())));
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2018-07-19 01:33:27 -04:00
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}
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2018-08-31 12:14:04 -04:00
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public static void Mov_C(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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2018-09-08 13:51:50 -04:00
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ShaderIrOperCbuf Cbuf = OpCode.Cbuf34();
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2018-04-10 15:50:32 -04:00
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2018-09-08 13:51:50 -04:00
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Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), Cbuf)));
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2018-04-10 15:50:32 -04:00
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}
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2018-08-31 12:14:04 -04:00
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public static void Mov_I(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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2018-09-08 13:51:50 -04:00
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ShaderIrOperImm Imm = OpCode.Imm19_20();
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2018-04-10 15:50:32 -04:00
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2018-09-08 13:51:50 -04:00
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Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), Imm)));
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2018-04-10 15:50:32 -04:00
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}
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2018-08-31 12:14:04 -04:00
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public static void Mov_I32(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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2018-09-08 13:51:50 -04:00
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ShaderIrOperImm Imm = OpCode.Imm32_20();
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2018-04-10 15:50:32 -04:00
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2018-09-08 13:51:50 -04:00
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Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), Imm)));
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2018-04-10 15:50:32 -04:00
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}
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2018-08-31 12:14:04 -04:00
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public static void Mov_R(ShaderIrBlock Block, long OpCode, long Position)
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2018-04-10 15:50:32 -04:00
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{
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2018-09-08 13:51:50 -04:00
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ShaderIrOperGpr Gpr = OpCode.Gpr20();
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2018-04-10 15:50:32 -04:00
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2018-09-08 13:51:50 -04:00
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Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), Gpr)));
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2018-04-10 15:50:32 -04:00
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}
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2018-08-31 12:14:04 -04:00
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public static void Sel_C(ShaderIrBlock Block, long OpCode, long Position)
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2018-07-17 15:50:00 -04:00
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{
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EmitSel(Block, OpCode, ShaderOper.CR);
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}
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2018-08-31 12:14:04 -04:00
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public static void Sel_I(ShaderIrBlock Block, long OpCode, long Position)
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2018-07-17 15:50:00 -04:00
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{
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EmitSel(Block, OpCode, ShaderOper.Imm);
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}
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2018-08-31 12:14:04 -04:00
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public static void Sel_R(ShaderIrBlock Block, long OpCode, long Position)
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2018-07-17 15:50:00 -04:00
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{
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EmitSel(Block, OpCode, ShaderOper.RR);
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}
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2018-08-31 12:14:04 -04:00
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public static void Mov_S(ShaderIrBlock Block, long OpCode, long Position)
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2018-07-19 01:33:27 -04:00
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{
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Block.AddNode(new ShaderIrCmnt("Stubbed."));
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//Zero is used as a special number to get a valid "0 * 0 + VertexIndex" in a GS
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ShaderIrNode Source = new ShaderIrOperImm(0);
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2018-09-08 13:51:50 -04:00
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Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), Source)));
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2018-07-19 01:33:27 -04:00
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}
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2018-04-10 15:50:32 -04:00
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private static void EmitF2f(ShaderIrBlock Block, long OpCode, ShaderOper Oper)
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{
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2018-09-08 13:51:50 -04:00
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bool NegA = OpCode.Read(45);
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bool AbsA = OpCode.Read(49);
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2018-04-10 15:50:32 -04:00
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ShaderIrNode OperA;
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switch (Oper)
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{
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2018-09-08 13:51:50 -04:00
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case ShaderOper.CR: OperA = OpCode.Cbuf34(); break;
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case ShaderOper.Immf: OperA = OpCode.Immf19_20(); break;
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case ShaderOper.RR: OperA = OpCode.Gpr20(); break;
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2018-04-10 15:50:32 -04:00
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default: throw new ArgumentException(nameof(Oper));
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}
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2018-05-17 14:25:42 -04:00
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OperA = GetAluFabsFneg(OperA, AbsA, NegA);
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2018-04-10 15:50:32 -04:00
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ShaderIrInst RoundInst = GetRoundInst(OpCode);
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if (RoundInst != ShaderIrInst.Invalid)
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{
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OperA = new ShaderIrOp(RoundInst, OperA);
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}
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2018-09-08 13:51:50 -04:00
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Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), OperA)));
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2018-04-10 15:50:32 -04:00
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}
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private static void EmitF2i(ShaderIrBlock Block, long OpCode, ShaderOper Oper)
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{
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IntType Type = GetIntType(OpCode);
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if (Type == IntType.U64 ||
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Type == IntType.S64)
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{
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//TODO: 64-bits support.
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//Note: GLSL doesn't support 64-bits integers.
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throw new NotImplementedException();
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}
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2018-09-08 13:51:50 -04:00
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bool NegA = OpCode.Read(45);
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bool AbsA = OpCode.Read(49);
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2018-04-10 15:50:32 -04:00
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ShaderIrNode OperA;
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switch (Oper)
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{
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2018-09-08 13:51:50 -04:00
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case ShaderOper.CR: OperA = OpCode.Cbuf34(); break;
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case ShaderOper.Immf: OperA = OpCode.Immf19_20(); break;
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case ShaderOper.RR: OperA = OpCode.Gpr20(); break;
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2018-04-10 15:50:32 -04:00
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default: throw new ArgumentException(nameof(Oper));
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}
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2018-05-17 14:25:42 -04:00
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OperA = GetAluFabsFneg(OperA, AbsA, NegA);
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2018-04-10 15:50:32 -04:00
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ShaderIrInst RoundInst = GetRoundInst(OpCode);
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if (RoundInst != ShaderIrInst.Invalid)
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{
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OperA = new ShaderIrOp(RoundInst, OperA);
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}
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bool Signed = Type >= IntType.S8;
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int Size = 8 << ((int)Type & 3);
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if (Size < 32)
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{
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uint Mask = uint.MaxValue >> (32 - Size);
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float CMin = 0;
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float CMax = Mask;
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if (Signed)
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{
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uint HalfMask = Mask >> 1;
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CMin -= HalfMask + 1;
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CMax = HalfMask;
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}
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ShaderIrOperImmf IMin = new ShaderIrOperImmf(CMin);
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ShaderIrOperImmf IMax = new ShaderIrOperImmf(CMax);
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2018-04-25 22:11:26 -04:00
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OperA = new ShaderIrOp(ShaderIrInst.Fclamp, OperA, IMin, IMax);
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2018-04-10 15:50:32 -04:00
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}
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ShaderIrInst Inst = Signed
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? ShaderIrInst.Ftos
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: ShaderIrInst.Ftou;
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ShaderIrNode Op = new ShaderIrOp(Inst, OperA);
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2018-09-08 13:51:50 -04:00
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Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), Op)));
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2018-04-10 15:50:32 -04:00
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}
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2018-04-08 15:17:35 -04:00
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private static void EmitI2f(ShaderIrBlock Block, long OpCode, ShaderOper Oper)
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{
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IntType Type = GetIntType(OpCode);
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if (Type == IntType.U64 ||
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Type == IntType.S64)
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{
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//TODO: 64-bits support.
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//Note: GLSL doesn't support 64-bits integers.
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throw new NotImplementedException();
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}
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2018-09-08 13:51:50 -04:00
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int Sel = OpCode.Read(41, 3);
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2018-04-08 15:17:35 -04:00
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2018-09-08 13:51:50 -04:00
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bool NegA = OpCode.Read(45);
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bool AbsA = OpCode.Read(49);
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2018-04-08 15:17:35 -04:00
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ShaderIrNode OperA;
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switch (Oper)
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{
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2018-09-08 13:51:50 -04:00
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case ShaderOper.CR: OperA = OpCode.Cbuf34(); break;
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case ShaderOper.Imm: OperA = OpCode.Imm19_20(); break;
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case ShaderOper.RR: OperA = OpCode.Gpr20(); break;
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2018-04-08 15:17:35 -04:00
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default: throw new ArgumentException(nameof(Oper));
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}
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2018-05-17 14:25:42 -04:00
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OperA = GetAluIabsIneg(OperA, AbsA, NegA);
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2018-04-08 15:17:35 -04:00
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bool Signed = Type >= IntType.S8;
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int Shift = Sel * 8;
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int Size = 8 << ((int)Type & 3);
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if (Shift != 0)
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{
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OperA = new ShaderIrOp(ShaderIrInst.Asr, OperA, new ShaderIrOperImm(Shift));
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}
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2018-04-10 15:50:32 -04:00
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if (Size < 32)
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2018-04-08 15:17:35 -04:00
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{
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2018-05-17 14:25:42 -04:00
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OperA = ExtendTo32(OperA, Signed, Size);
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2018-04-08 15:17:35 -04:00
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}
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ShaderIrInst Inst = Signed
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? ShaderIrInst.Stof
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: ShaderIrInst.Utof;
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ShaderIrNode Op = new ShaderIrOp(Inst, OperA);
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2018-09-08 13:51:50 -04:00
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Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), Op)));
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2018-04-08 15:17:35 -04:00
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}
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2018-04-25 22:11:26 -04:00
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private static void EmitI2i(ShaderIrBlock Block, long OpCode, ShaderOper Oper)
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{
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IntType Type = GetIntType(OpCode);
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if (Type == IntType.U64 ||
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Type == IntType.S64)
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{
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//TODO: 64-bits support.
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//Note: GLSL doesn't support 64-bits integers.
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throw new NotImplementedException();
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}
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2018-09-08 13:51:50 -04:00
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int Sel = OpCode.Read(41, 3);
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2018-04-25 22:11:26 -04:00
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2018-09-08 13:51:50 -04:00
|
|
|
bool NegA = OpCode.Read(45);
|
|
|
|
bool AbsA = OpCode.Read(49);
|
|
|
|
bool SatA = OpCode.Read(50);
|
2018-04-25 22:11:26 -04:00
|
|
|
|
|
|
|
ShaderIrNode OperA;
|
|
|
|
|
|
|
|
switch (Oper)
|
|
|
|
{
|
2018-09-08 13:51:50 -04:00
|
|
|
case ShaderOper.CR: OperA = OpCode.Cbuf34(); break;
|
|
|
|
case ShaderOper.Immf: OperA = OpCode.Immf19_20(); break;
|
|
|
|
case ShaderOper.RR: OperA = OpCode.Gpr20(); break;
|
2018-04-25 22:11:26 -04:00
|
|
|
|
|
|
|
default: throw new ArgumentException(nameof(Oper));
|
|
|
|
}
|
|
|
|
|
2018-05-17 14:25:42 -04:00
|
|
|
OperA = GetAluIabsIneg(OperA, AbsA, NegA);
|
2018-04-25 22:11:26 -04:00
|
|
|
|
|
|
|
bool Signed = Type >= IntType.S8;
|
|
|
|
|
|
|
|
int Shift = Sel * 8;
|
|
|
|
|
|
|
|
int Size = 8 << ((int)Type & 3);
|
|
|
|
|
|
|
|
if (Shift != 0)
|
|
|
|
{
|
|
|
|
OperA = new ShaderIrOp(ShaderIrInst.Asr, OperA, new ShaderIrOperImm(Shift));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Size < 32)
|
|
|
|
{
|
|
|
|
uint Mask = uint.MaxValue >> (32 - Size);
|
|
|
|
|
|
|
|
if (SatA)
|
|
|
|
{
|
|
|
|
uint CMin = 0;
|
|
|
|
uint CMax = Mask;
|
|
|
|
|
|
|
|
if (Signed)
|
|
|
|
{
|
|
|
|
uint HalfMask = Mask >> 1;
|
|
|
|
|
|
|
|
CMin -= HalfMask + 1;
|
|
|
|
CMax = HalfMask;
|
|
|
|
}
|
|
|
|
|
|
|
|
ShaderIrOperImm IMin = new ShaderIrOperImm((int)CMin);
|
|
|
|
ShaderIrOperImm IMax = new ShaderIrOperImm((int)CMax);
|
|
|
|
|
|
|
|
OperA = new ShaderIrOp(Signed
|
|
|
|
? ShaderIrInst.Clamps
|
|
|
|
: ShaderIrInst.Clampu, OperA, IMin, IMax);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2018-05-17 14:25:42 -04:00
|
|
|
OperA = ExtendTo32(OperA, Signed, Size);
|
2018-04-25 22:11:26 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-09-08 13:51:50 -04:00
|
|
|
Block.AddNode(OpCode.PredNode(new ShaderIrAsg(OpCode.Gpr0(), OperA)));
|
2018-04-25 22:11:26 -04:00
|
|
|
}
|
|
|
|
|
2018-07-17 15:50:00 -04:00
|
|
|
private static void EmitSel(ShaderIrBlock Block, long OpCode, ShaderOper Oper)
|
|
|
|
{
|
2018-09-08 13:51:50 -04:00
|
|
|
ShaderIrOperGpr Dst = OpCode.Gpr0();
|
|
|
|
ShaderIrNode Pred = OpCode.Pred39N();
|
2018-07-17 15:50:00 -04:00
|
|
|
|
2018-09-08 13:51:50 -04:00
|
|
|
ShaderIrNode ResultA = OpCode.Gpr8();
|
2018-07-17 15:50:00 -04:00
|
|
|
ShaderIrNode ResultB;
|
|
|
|
|
|
|
|
switch (Oper)
|
|
|
|
{
|
2018-09-08 13:51:50 -04:00
|
|
|
case ShaderOper.CR: ResultB = OpCode.Cbuf34(); break;
|
|
|
|
case ShaderOper.Imm: ResultB = OpCode.Imm19_20(); break;
|
|
|
|
case ShaderOper.RR: ResultB = OpCode.Gpr20(); break;
|
2018-07-17 15:50:00 -04:00
|
|
|
|
|
|
|
default: throw new ArgumentException(nameof(Oper));
|
|
|
|
}
|
|
|
|
|
2018-09-08 13:51:50 -04:00
|
|
|
Block.AddNode(OpCode.PredNode(new ShaderIrCond(Pred, new ShaderIrAsg(Dst, ResultA), false)));
|
2018-07-17 15:50:00 -04:00
|
|
|
|
2018-09-08 13:51:50 -04:00
|
|
|
Block.AddNode(OpCode.PredNode(new ShaderIrCond(Pred, new ShaderIrAsg(Dst, ResultB), true)));
|
2018-07-17 15:50:00 -04:00
|
|
|
}
|
|
|
|
|
2018-04-08 15:17:35 -04:00
|
|
|
private static IntType GetIntType(long OpCode)
|
|
|
|
{
|
2018-09-08 13:51:50 -04:00
|
|
|
bool Signed = OpCode.Read(13);
|
2018-04-08 15:17:35 -04:00
|
|
|
|
2018-09-08 13:51:50 -04:00
|
|
|
IntType Type = (IntType)(OpCode.Read(10, 3));
|
2018-04-08 15:17:35 -04:00
|
|
|
|
|
|
|
if (Signed)
|
|
|
|
{
|
|
|
|
Type += (int)IntType.S8;
|
|
|
|
}
|
|
|
|
|
|
|
|
return Type;
|
|
|
|
}
|
|
|
|
|
|
|
|
private static FloatType GetFloatType(long OpCode)
|
|
|
|
{
|
2018-09-08 13:51:50 -04:00
|
|
|
return (FloatType)(OpCode.Read(8, 3));
|
2018-04-08 15:17:35 -04:00
|
|
|
}
|
2018-04-10 15:50:32 -04:00
|
|
|
|
|
|
|
private static ShaderIrInst GetRoundInst(long OpCode)
|
|
|
|
{
|
2018-09-08 13:51:50 -04:00
|
|
|
switch (OpCode.Read(39, 3))
|
2018-04-10 15:50:32 -04:00
|
|
|
{
|
|
|
|
case 1: return ShaderIrInst.Floor;
|
|
|
|
case 2: return ShaderIrInst.Ceil;
|
|
|
|
case 3: return ShaderIrInst.Trunc;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ShaderIrInst.Invalid;
|
|
|
|
}
|
2018-04-08 15:17:35 -04:00
|
|
|
}
|
|
|
|
}
|