65 lines
2.2 KiB
C#
65 lines
2.2 KiB
C#
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using ChocolArm64.Decoder;
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using ChocolArm64.State;
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using System;
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namespace ChocolArm64.Instruction32
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{
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static class A32InstInterpretHelper
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{
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public static bool IsConditionTrue(AThreadState State, ACond Cond)
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{
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switch (Cond)
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{
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case ACond.Eq: return State.Zero;
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case ACond.Ne: return !State.Zero;
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case ACond.Ge_Un: return State.Carry;
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case ACond.Lt_Un: return !State.Carry;
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case ACond.Mi: return State.Negative;
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case ACond.Pl: return !State.Negative;
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case ACond.Vs: return State.Overflow;
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case ACond.Vc: return !State.Overflow;
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case ACond.Gt_Un: return State.Carry && !State.Zero;
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case ACond.Le_Un: return !State.Carry && State.Zero;
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case ACond.Ge: return State.Negative == State.Overflow;
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case ACond.Lt: return State.Negative != State.Overflow;
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case ACond.Gt: return State.Negative == State.Overflow && !State.Zero;
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case ACond.Le: return State.Negative != State.Overflow && State.Zero;
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}
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return true;
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}
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public unsafe static uint GetReg(AThreadState State, int Reg)
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{
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if ((uint)Reg > 15)
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{
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throw new ArgumentOutOfRangeException(nameof(Reg));
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}
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fixed (uint* Ptr = &State.R0)
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{
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return *(Ptr + Reg);
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}
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}
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public unsafe static void SetReg(AThreadState State, int Reg, uint Value)
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{
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if ((uint)Reg > 15)
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{
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throw new ArgumentOutOfRangeException(nameof(Reg));
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}
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fixed (uint* Ptr = &State.R0)
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{
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*(Ptr + Reg) = Value;
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}
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}
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public static uint GetPc(AThreadState State)
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{
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//Due to the old fetch-decode-execute pipeline of old ARM CPUs,
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//the PC is 4 or 8 bytes (2 instructions) ahead of the current instruction.
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return State.R15 + (State.Thumb ? 2U : 4U);
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}
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}
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}
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