Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
* Update SoftFloat.cs * Update SoftFallback.cs * Update InstEmitSimdShift.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdArithmetic.cs * Update CryptoHelper.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update CpuThreadState.cs * Update OpCodeTable.cs * Add files via upload * Nit. * Remove unused using. Nit. * Remove unused using. FZ update. * Nit. * Remove unused using.
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LDj3SNuD
gdkchan
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53e6664526
commit
1e7ea76f14
28 changed files with 5843 additions and 5639 deletions
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@ -1,12 +1,10 @@
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#define CcmpReg
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using ChocolArm64.State;
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using NUnit.Framework;
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namespace Ryujinx.Tests.Cpu
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{
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[Category("CcmpReg")] // Tested: second half of 2018.
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[Category("CcmpReg")]
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public sealed class CpuTestCcmpReg : CpuTest
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{
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#if CcmpReg
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@ -14,97 +12,97 @@ namespace Ryujinx.Tests.Cpu
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private const int RndCntNzcv = 2;
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[Test, Pairwise, Description("CCMN <Xn>, <Xm>, #<nzcv>, <cond>")]
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public void Ccmn_64bit([Values(1u, 31u)] uint Rn,
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[Values(2u, 31u)] uint Rm,
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public void Ccmn_64bit([Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong Xn,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong Xm,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
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[Random(0u, 15u, RndCntNzcv)] uint nzcv,
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[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
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0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
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0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
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0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
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{
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uint Opcode = 0xBA400000; // CCMN X0, X0, #0, EQ
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Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5);
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Opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
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uint opcode = 0xBA400000; // CCMN X0, X0, #0, EQ
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5);
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opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
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ulong _X31 = TestContext.CurrentContext.Random.NextULong();
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
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SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("CCMN <Wn>, <Wm>, #<nzcv>, <cond>")]
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public void Ccmn_32bit([Values(1u, 31u)] uint Rn,
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[Values(2u, 31u)] uint Rm,
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public void Ccmn_32bit([Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint Wn,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint Wm,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Random(0u, 15u, RndCntNzcv)] uint nzcv,
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[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
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0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
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0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
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0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
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{
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uint Opcode = 0x3A400000; // CCMN W0, W0, #0, EQ
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Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5);
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Opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
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uint opcode = 0x3A400000; // CCMN W0, W0, #0, EQ
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5);
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opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
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uint _W31 = TestContext.CurrentContext.Random.NextUInt();
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
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SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("CCMP <Xn>, <Xm>, #<nzcv>, <cond>")]
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public void Ccmp_64bit([Values(1u, 31u)] uint Rn,
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[Values(2u, 31u)] uint Rm,
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public void Ccmp_64bit([Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong Xn,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong Xm,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
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[Random(0u, 15u, RndCntNzcv)] uint nzcv,
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[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
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0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
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0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
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0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
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{
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uint Opcode = 0xFA400000; // CCMP X0, X0, #0, EQ
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Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5);
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Opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
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uint opcode = 0xFA400000; // CCMP X0, X0, #0, EQ
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5);
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opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
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ulong _X31 = TestContext.CurrentContext.Random.NextULong();
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
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SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("CCMP <Wn>, <Wm>, #<nzcv>, <cond>")]
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public void Ccmp_32bit([Values(1u, 31u)] uint Rn,
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[Values(2u, 31u)] uint Rm,
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public void Ccmp_32bit([Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint Wn,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint Wm,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Random(0u, 15u, RndCntNzcv)] uint nzcv,
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[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
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0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
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0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
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0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
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{
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uint Opcode = 0x7A400000; // CCMP W0, W0, #0, EQ
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Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5);
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Opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
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uint opcode = 0x7A400000; // CCMP W0, W0, #0, EQ
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5);
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opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
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uint _W31 = TestContext.CurrentContext.Random.NextUInt();
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
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SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
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CompareAgainstUnicorn();
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}
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