New NVDEC and VIC implementation (#1384)
* Initial NVDEC and VIC implementation * Update FFmpeg.AutoGen to 4.3.0 * Add nvdec dependencies for Windows * Unify some VP9 structures * Rename VP9 structure fields * Improvements to Video API * XML docs for Common.Memory * Remove now unused or redundant overloads from MemoryAccessor * NVDEC UV surface read/write scalar paths * Add FIXME comments about hacky things/stuff that will need to be fixed in the future * Cleaned up VP9 memory allocation * Remove some debug logs * Rename some VP9 structs * Remove unused struct * No need to compile Ryujinx.Graphics.Host1x with unsafe anymore * Name AsyncWorkQueue threads to make debugging easier * Make Vp9PictureInfo a ref struct * LayoutConverter no longer needs the depth argument (broken by rebase) * Pooling of VP9 buffers, plus fix a memory leak on VP9 * Really wish VS could rename projects properly... * Address feedback * Remove using * Catch OperationCanceledException * Add licensing informations * Add THIRDPARTY.md to release too Co-authored-by: Thog <me@thog.eu>
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202 changed files with 20563 additions and 2567 deletions
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@ -67,7 +67,7 @@ namespace Ryujinx.Graphics.Gpu.Engine
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TextureManager.SetComputeTextureBufferIndex(state.Get<int>(MethodOffset.TextureBufferIndex));
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ShaderProgramInfo info = cs.Shaders[0].Program.Info;
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ShaderProgramInfo info = cs.Shaders[0].Program.Info;
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for (int index = 0; index < info.CBuffers.Count; index++)
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{
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@ -63,7 +63,7 @@ namespace Ryujinx.Graphics.Gpu.Engine
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else
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{
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evt.Flush();
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return (_context.MemoryAccessor.ReadUInt64(gpuVa) != 0) ? ConditionalRenderEnabled.True : ConditionalRenderEnabled.False;
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return (_context.MemoryAccessor.Read<ulong>(gpuVa) != 0) ? ConditionalRenderEnabled.True : ConditionalRenderEnabled.False;
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}
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}
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@ -87,11 +87,11 @@ namespace Ryujinx.Graphics.Gpu.Engine
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if (evt != null && evt2 == null)
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{
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useHost = _context.Renderer.Pipeline.TryHostConditionalRendering(evt, _context.MemoryAccessor.ReadUInt64(gpuVa + 16), isEqual);
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useHost = _context.Renderer.Pipeline.TryHostConditionalRendering(evt, _context.MemoryAccessor.Read<ulong>(gpuVa + 16), isEqual);
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}
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else if (evt == null && evt2 != null)
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{
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useHost = _context.Renderer.Pipeline.TryHostConditionalRendering(evt2, _context.MemoryAccessor.ReadUInt64(gpuVa), isEqual);
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useHost = _context.Renderer.Pipeline.TryHostConditionalRendering(evt2, _context.MemoryAccessor.Read<ulong>(gpuVa), isEqual);
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}
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else
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{
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@ -107,8 +107,8 @@ namespace Ryujinx.Graphics.Gpu.Engine
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evt?.Flush();
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evt2?.Flush();
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ulong x = _context.MemoryAccessor.ReadUInt64(gpuVa);
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ulong y = _context.MemoryAccessor.ReadUInt64(gpuVa + 16);
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ulong x = _context.MemoryAccessor.Read<ulong>(gpuVa);
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ulong y = _context.MemoryAccessor.Read<ulong>(gpuVa + 16);
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return (isEqual ? x == y : x != y) ? ConditionalRenderEnabled.True : ConditionalRenderEnabled.False;
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}
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@ -466,7 +466,7 @@ namespace Ryujinx.Graphics.Gpu.Engine
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bool flipY = yControl.HasFlag(YControl.NegateY);
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Origin origin = yControl.HasFlag(YControl.TriangleRastFlip) ? Origin.LowerLeft : Origin.UpperLeft;
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_context.Renderer.Pipeline.SetOrigin(origin);
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// The triangle rast flip flag only affects rasterization, the viewport is not flipped.
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@ -77,7 +77,7 @@ namespace Ryujinx.Graphics.Gpu
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{
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Renderer = renderer;
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MemoryManager = new MemoryManager();
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MemoryManager = new MemoryManager(this);
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MemoryAccessor = new MemoryAccessor(this);
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@ -643,6 +643,8 @@ namespace Ryujinx.Graphics.Gpu.Image
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overlap.ChangeSize(info.Width, info.Height, info.DepthOrLayers);
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}
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overlap.SynchronizeMemory();
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return overlap;
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}
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}
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@ -58,42 +58,6 @@ namespace Ryujinx.Graphics.Gpu.Memory
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return MemoryMarshal.Cast<byte, T>(_context.PhysicalMemory.GetSpan(processVa, Unsafe.SizeOf<T>()))[0];
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}
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/// <summary>
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/// Reads a 32-bits signed integer from GPU mapped memory.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address where the value is located</param>
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/// <returns>The value at the specified memory location</returns>
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public int ReadInt32(ulong gpuVa)
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{
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ulong processVa = _context.MemoryManager.Translate(gpuVa);
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return _context.PhysicalMemory.Read<int>(processVa);
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}
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/// <summary>
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/// Reads a 64-bits unsigned integer from GPU mapped memory.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address where the value is located</param>
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/// <returns>The value at the specified memory location</returns>
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public ulong ReadUInt64(ulong gpuVa)
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{
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ulong processVa = _context.MemoryManager.Translate(gpuVa);
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return _context.PhysicalMemory.Read<ulong>(processVa);
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}
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/// <summary>
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/// Reads a 8-bits unsigned integer from GPU mapped memory.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address where the value is located</param>
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/// <param name="value">The value to be written</param>
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public void WriteByte(ulong gpuVa, byte value)
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{
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ulong processVa = _context.MemoryManager.Translate(gpuVa);
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_context.PhysicalMemory.Write(processVa, MemoryMarshal.CreateSpan(ref value, 1));
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}
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/// <summary>
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/// Writes a 32-bits signed integer to GPU mapped memory.
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/// </summary>
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@ -1,4 +1,7 @@
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using Ryujinx.Cpu;
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using System;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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namespace Ryujinx.Graphics.Gpu.Memory
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{
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@ -33,14 +36,69 @@ namespace Ryujinx.Graphics.Gpu.Memory
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public event EventHandler<UnmapEventArgs> MemoryUnmapped;
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private GpuContext _context;
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/// <summary>
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/// Creates a new instance of the GPU memory manager.
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/// </summary>
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public MemoryManager()
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public MemoryManager(GpuContext context)
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{
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_context = context;
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_pageTable = new ulong[PtLvl0Size][];
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}
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/// <summary>
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/// Reads data from GPU mapped memory.
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/// </summary>
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/// <typeparam name="T">Type of the data</typeparam>
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/// <param name="gpuVa">GPU virtual address where the data is located</param>
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/// <returns>The data at the specified memory location</returns>
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public T Read<T>(ulong gpuVa) where T : unmanaged
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{
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ulong processVa = Translate(gpuVa);
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return MemoryMarshal.Cast<byte, T>(_context.PhysicalMemory.GetSpan(processVa, Unsafe.SizeOf<T>()))[0];
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}
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/// <summary>
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/// Gets a read-only span of data from GPU mapped memory.
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/// This reads as much data as possible, up to the specified maximum size.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address where the data is located</param>
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/// <param name="size">Size of the data</param>
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/// <returns>The span of the data at the specified memory location</returns>
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public ReadOnlySpan<byte> GetSpan(ulong gpuVa, int size)
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{
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ulong processVa = Translate(gpuVa);
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return _context.PhysicalMemory.GetSpan(processVa, size);
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}
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/// <summary>
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/// Gets a writable region from GPU mapped memory.
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/// </summary>
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/// <param name="address">Start address of the range</param>
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/// <param name="size">Size in bytes to be range</param>
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/// <returns>A writable region with the data at the specified memory location</returns>
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public WritableRegion GetWritableRegion(ulong gpuVa, int size)
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{
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ulong processVa = Translate(gpuVa);
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return _context.PhysicalMemory.GetWritableRegion(processVa, size);
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}
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/// <summary>
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/// Writes data to GPU mapped memory.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address to write the data into</param>
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/// <param name="data">The data to be written</param>
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public void Write(ulong gpuVa, ReadOnlySpan<byte> data)
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{
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ulong processVa = Translate(gpuVa);
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_context.PhysicalMemory.Write(processVa, data);
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}
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/// <summary>
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/// Maps a given range of pages to the specified CPU virtual address.
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/// </summary>
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@ -1,3 +1,4 @@
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using Ryujinx.Cpu;
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using System;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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@ -34,6 +35,17 @@ namespace Ryujinx.Graphics.Gpu.Memory
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return _cpuMemory.GetSpan(address, size);
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}
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/// <summary>
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/// Gets a writable region from the application process.
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/// </summary>
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/// <param name="address">Start address of the range</param>
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/// <param name="size">Size in bytes to be range</param>
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/// <returns>A writable region with the data at the specified memory location</returns>
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public WritableRegion GetWritableRegion(ulong address, int size)
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{
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return _cpuMemory.GetWritableRegion(address, size);
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}
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/// <summary>
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/// Reads data from the application process.
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/// </summary>
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