Refactoring and optimization on CPU translation (#661)

* Refactoring and optimization on CPU translation

* Remove now unused property

* Rename ilBlock -> block (local)

* Change equality comparison on RegisterMask for consistency

Co-Authored-By: gdkchan <gab.dark.100@gmail.com>

* Add back the aggressive inlining attribute to the Synchronize method

* Implement IEquatable on the Register struct

* Fix identation

ChocolArm64/State/CpuThreadState.cs

@@ -9,11 +9,11 @@ namespace ChocolArm64.State
 {
     public class CpuThreadState
     {
+        private const int MinCountForCheck = 40000;
+
         internal const int ErgSizeLog2 = 4;
         internal const int DczSizeLog2 = 4;
 
-        private const int MinInstForCheck = 4000000;
-
         public ulong X0,  X1,  X2,  X3,  X4,  X5,  X6,  X7,
                      X8,  X9,  X10, X11, X12, X13, X14, X15,
                      X16, X17, X18, X19, X20, X21, X22, X23,
@@ -124,13 +124,13 @@ namespace ChocolArm64.State
         }
 
         [MethodImpl(MethodImplOptions.AggressiveInlining)]
-        internal bool Synchronize(int bbWeight)
+        internal bool Synchronize()
         {
             //Firing a interrupt frequently is expensive, so we only
             //do it after a given number of instructions has executed.
-            _syncCount += bbWeight;
+            _syncCount++;
 
-            if (_syncCount >= MinInstForCheck)
+            if (_syncCount >= MinCountForCheck)
             {
                 CheckInterrupt();
             }
@@ -138,11 +138,6 @@ namespace ChocolArm64.State
             return Running;
         }
 
-        internal void RequestInterrupt()
-        {
-            _interrupted = true;
-        }
-
         [MethodImpl(MethodImplOptions.NoInlining)]
         private void CheckInterrupt()
         {
@@ -156,6 +151,11 @@ namespace ChocolArm64.State
             }
         }
 
+        internal void RequestInterrupt()
+        {
+            _interrupted = true;
+        }
+
         internal void OnBreak(long position, int imm)
         {
             Break?.Invoke(this, new InstExceptionEventArgs(position, imm));

ChocolArm64/State/Register.cs

@@ -3,7 +3,7 @@ using System.Reflection;
 
 namespace ChocolArm64.State
 {
-    struct Register
+    struct Register : IEquatable<Register>
     {
         public int Index;
 
@@ -22,9 +22,12 @@ namespace ChocolArm64.State
 
         public override bool Equals(object obj)
         {
-            return obj is Register reg &&
-                   reg.Index == Index &&
-                   reg.Type  == Type;
+            return obj is Register reg && Equals(reg);
+        }
+
+        public bool Equals(Register other)
+        {
+            return Index == other.Index && Type == other.Type;
         }
 
         public FieldInfo GetField()

ChocolArm64/State/RegisterConsts.cs

@@ -0,0 +1,8 @@
+namespace ChocolArm64.State
+{
+    static class RegisterConsts
+    {
+        public const int RegsCount = 32;
+        public const int RegsMask  = RegsCount - 1;
+    }
+}