Fix Fcvtl_V and Fcvtn_V; fix half to float conv. and add float to half conv. (full FP emu.). Add 4 FP Tests. (#468)

* Update CpuTest.cs

* Update CpuTestSimd.cs

* Superseded.

* Update AInstEmitSimdCvt.cs

* Update ASoftFloat.cs

* Nit.

* Update PackageReferences.

* Update AInstEmitSimdArithmetic.cs

* Update AVectorHelper.cs

* Update ASoftFloat.cs

* Update ASoftFallback.cs

* Update AThreadState.cs

* Create FPType.cs

* Create FPExc.cs

* Create FPCR.cs

* Create FPSR.cs

* Update ARoundMode.cs

* Update APState.cs

* Avoid an unwanted implicit cast of the operator >= to long, continuing to check for negative values. Remove a leftover.

* Nits.

ChocolArm64/State/APState.cs

@@ -3,7 +3,7 @@ using System;
 namespace ChocolArm64.State
 {
     [Flags]
-    public enum APState
+    enum APState
     {
         VBit = 28,
         CBit = 29,
@@ -20,4 +20,4 @@ namespace ChocolArm64.State
 
         NZCV = NZ | CV
     }
-}
+}

ChocolArm64/State/ARoundMode.cs

@@ -1,10 +1,10 @@
 namespace ChocolArm64.State
 {
-    public enum ARoundMode
+    enum ARoundMode
     {
         ToNearest            = 0,
         TowardsPlusInfinity  = 1,
         TowardsMinusInfinity = 2,
         TowardsZero          = 3
     }
-}
+}

ChocolArm64/State/AThreadState.cs

@@ -145,5 +145,20 @@ namespace ChocolArm64.State
         {
             Undefined?.Invoke(this, new AInstUndefinedEventArgs(Position, RawOpCode));
         }
+
+        internal bool GetFpcrFlag(FPCR Flag)
+        {
+            return (Fpcr & (1 << (int)Flag)) != 0;
+        }
+
+        internal void SetFpsrFlag(FPSR Flag)
+        {
+            Fpsr |= 1 << (int)Flag;
+        }
+
+        internal ARoundMode FPRoundingMode()
+        {
+            return (ARoundMode)((Fpcr >> (int)FPCR.RMode) & 3);
+        }
     }
-}
+}

ChocolArm64/State/FPCR.cs

@@ -0,0 +1,11 @@
+namespace ChocolArm64.State
+{
+    enum FPCR
+    {
+        UFE   = 11,
+        RMode = 22,
+        FZ    = 24,
+        DN    = 25,
+        AHP   = 26
+    }
+}

ChocolArm64/State/FPExc.cs

@@ -0,0 +1,12 @@
+namespace ChocolArm64.State
+{
+    enum FPExc
+    {
+        InvalidOp    = 0,
+        DivideByZero = 1,
+        Overflow     = 2,
+        Underflow    = 3,
+        Inexact      = 4,
+        InputDenorm  = 7
+    }
+}

ChocolArm64/State/FPSR.cs

@@ -0,0 +1,8 @@
+namespace ChocolArm64.State
+{
+    enum FPSR
+    {
+        UFC = 3,
+        QC  = 27
+    }
+}

ChocolArm64/State/FPType.cs

@@ -0,0 +1,11 @@
+namespace ChocolArm64.State
+{
+    enum FPType
+    {
+        Nonzero,
+        Zero,
+        Infinity,
+        QNaN,
+        SNaN
+    }
+}