LDj3SNuD a0c78f7920 Fix/Add 10 Shift Right and Mls_Ve Instructions; add 14 Tests. (#407) ... * Update AOpCodeTable.cs * Update AInstEmitSimdShift.cs * Update ASoftFallback.cs * Update AOpCodeSimdShImm.cs * Update ABitUtils.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdHelper.cs * Create CpuTestSimdShImm.cs * Create CpuTestSimdRegElem.cs * Address PR feedback. * Nit. * Nit.		2018-09-08 14:24:29 -03:00
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ABlock.cs	Added support for more shader instructions and texture formats, fix swapped channels in RGB565 and RGBA5551? texture formats, allow zero values on blending registers, initial work to build CFG on the shader decoder, update the BRA instruction to work with it (WIP)	2018-05-29 20:37:10 -03:00
ACond.cs
ADataOp.cs
ADecoder.cs	Added support for more shader instructions and texture formats, fix swapped channels in RGB565 and RGBA5551? texture formats, allow zero values on blending registers, initial work to build CFG on the shader decoder, update the BRA instruction to work with it (WIP)	2018-05-29 20:37:10 -03:00
ADecoderHelper.cs
AIntType.cs
AOpCode.cs	Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)	2018-05-26 17:50:47 -03:00
AOpCodeAdr.cs
AOpCodeAlu.cs
AOpCodeAluImm.cs
AOpCodeAluRs.cs
AOpCodeAluRx.cs
AOpCodeBfm.cs
AOpCodeBImm.cs
AOpCodeBImmAl.cs
AOpCodeBImmCmp.cs	[CPU] Fix CBZ/CBNZ with 32 bits operands	2018-04-06 17:22:26 -03:00
AOpCodeBImmCond.cs
AOpCodeBImmTest.cs
AOpCodeBReg.cs
AOpCodeCcmp.cs
AOpCodeCcmpImm.cs
AOpCodeCcmpReg.cs
AOpCodeCsel.cs
AOpCodeException.cs
AOpCodeMem.cs
AOpCodeMemEx.cs
AOpCodeMemImm.cs
AOpCodeMemLit.cs
AOpCodeMemPair.cs
AOpCodeMemReg.cs
AOpCodeMov.cs
AOpCodeMul.cs
AOpCodeSimd.cs
AOpCodeSimdCvt.cs
AOpCodeSimdExt.cs
AOpCodeSimdFcond.cs
AOpCodeSimdFmov.cs
AOpCodeSimdImm.cs
AOpCodeSimdIns.cs
AOpCodeSimdMemImm.cs
AOpCodeSimdMemLit.cs
AOpCodeSimdMemMs.cs	Enable all ld/st (single structure) instructions	2018-03-30 18:06:02 -03:00
AOpCodeSimdMemPair.cs
AOpCodeSimdMemReg.cs
AOpCodeSimdMemSs.cs	Enable all ld/st (single structure) instructions	2018-03-30 18:06:02 -03:00
AOpCodeSimdReg.cs
AOpCodeSimdRegElem.cs	Add MLA (vector by element), fixes some cases of MUL (vector by element)?	2018-03-15 22:36:47 -03:00
AOpCodeSimdRegElemF.cs
AOpCodeSimdShImm.cs	Fix/Add 10 Shift Right and Mls_Ve Instructions; add 14 Tests. (#407)	2018-09-08 14:24:29 -03:00
AOpCodeSimdTbl.cs
AOpCodeSystem.cs
AShiftType.cs
IAOpCode.cs
IAOpCodeAlu.cs
IAOpCodeAluImm.cs
IAOpCodeAluRs.cs
IAOpCodeAluRx.cs
IAOpCodeCond.cs
IAOpCodeLit.cs
IAOpCodeSimd.cs