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CpuTest.cs
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Implement a new physical memory manager and replace DeviceMemory (#856)
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2020-05-04 08:54:50 +10:00 |
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CpuTest32.cs
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Implement a new physical memory manager and replace DeviceMemory (#856)
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2020-05-04 08:54:50 +10:00 |
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CpuTestAlu.cs
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Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
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2019-06-12 09:03:31 -03:00 |
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CpuTestAlu32.cs
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Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
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2020-03-01 07:51:55 +11:00 |
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CpuTestAluBinary.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestAluImm.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
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CpuTestAluRs.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestAluRs32.cs
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Add most of the A32 instruction set to ARMeilleure (#897)
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2020-02-24 08:20:40 +11:00 |
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CpuTestAluRx.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
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CpuTestBf32.cs
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Add most of the A32 instruction set to ARMeilleure (#897)
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2020-02-24 08:20:40 +11:00 |
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CpuTestBfm.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
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CpuTestCcmpImm.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
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CpuTestCcmpReg.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
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CpuTestCsel.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
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CpuTestMisc.cs
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Improve V128 (#1097)
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2020-04-17 08:19:20 +10:00 |
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CpuTestMov.cs
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Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
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2019-06-12 09:03:31 -03:00 |
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CpuTestMul.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
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CpuTestMul32.cs
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Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
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2020-03-01 07:51:55 +11:00 |
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CpuTestSimd.cs
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Add FMaxNmV & FMinNmV Inst.s with Test. (#1279)
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2020-05-27 18:51:59 +02:00 |
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CpuTestSimdCrypto.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestSimdCrypto32.cs
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Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)
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2020-03-14 10:29:58 +11:00 |
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CpuTestSimdCvt.cs
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Implemented fast paths for: (#846)
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2019-12-29 22:22:47 -03:00 |
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CpuTestSimdExt.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestSimdFcond.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestSimdFmov.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestSimdImm.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestSimdIns.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestSimdLogical32.cs
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Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)
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2020-03-14 10:29:58 +11:00 |
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CpuTestSimdMemory32.cs
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Add most of the A32 instruction set to ARMeilleure (#897)
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2020-02-24 08:20:40 +11:00 |
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CpuTestSimdMov32.cs
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Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960)
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2020-03-10 16:17:30 +11:00 |
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CpuTestSimdReg.cs
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Implement FACGE and FACGT (Scalar and Vector) AArch64 SIMD instructions (#956)
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2020-03-01 07:51:17 +11:00 |
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CpuTestSimdReg32.cs
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Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)
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2020-03-11 11:49:27 +11:00 |
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CpuTestSimdRegElem.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestSimdRegElem32.cs
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Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)
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2020-03-11 11:49:27 +11:00 |
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CpuTestSimdRegElemF.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
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CpuTestSimdShImm.cs
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Implemented fast paths for: (#846)
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2019-12-29 22:22:47 -03:00 |
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CpuTestSimdShImm32.cs
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Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)
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2020-03-11 11:49:27 +11:00 |
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CpuTestSimdTbl.cs
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Add Tbx Inst. (fast & slow paths), with Tests. (#782)
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2019-10-04 11:43:20 -03:00 |
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CpuTestSystem.cs
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Add Mrs & Msr (Nzcv) Inst., with Tests. (#819)
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2019-11-14 13:08:07 +11:00 |
